1. Field of the Invention
The present invention generally relates to a field effect semiconductor device provided with a gate resistance circuit for restricting gate current of an insulated gate and its production method and more particularly, to the gate resistance circuit and its production method.
2. Description of the Prior Art
For example, a power module into which a main circuit including a field effect semiconductor device such as an insulated-gate bipolar transistor (IGBT) and a control circuit including a control IC for controlling operation of the main circuit are incorporated is applied to an inverter for controlling a motor, etc. Hereinafter, two conventional power modules each including an IGBT are described with reference to FIGS. 7 to 9. In the conventional power module of FIG. 7, a main circuit pattern (not shown) and a control circuit pattern (not shown) are formed on one principal face of an insulated substrate 1. An IGBT 2 acting as a field effect semiconductor device is provided on the main circuit pattern and has a capacity Cge (not shown) between an insulated gate G and an emitter E. Meanwhile, a flywheel diode 3 is provided in a direction opposite to that of the IGBT 2 and in parallel with the IGBT 2. Furthermore, a control IC 4 for controlling the IGBT 2 is provided on the control circuit pattern.
Meanwhile, a gate resistance circuit 5 is inserted between an output terminal 4a of the control IC 4 and an insulated gate terminal (gate pad) 2A of the IGBT 2. The gate resistance circuit 5 restricts charging and discharge currents flowing in and from between the insulated gate G and the emitter E of the IGBT 2, respectively, which are produced by turning on and off a control voltage Vd outputted from the output terminal 4a of the control IC 4, respectively. The gate resistance circuit 5 is constituted by a gate resistance 6 and the insulated substrate 1 has a pattern area (not shown) in which the gate resistance circuit 5 is provided.
Meanwhile, a main circuit terminal (not shown) joined to the main circuit pattern, a control circuit terminal (not shown) joined to the control circuit pattern, etc. are provided on the insulated substrate 1. The main circuit terminal and the control circuit terminal are, respectively, connected to the IGBT 2 and the control IC 4 by aluminum wires. Furthermore, a power module casing (not shown) is constituted by a bottom plate formed by a metal base plate (not shown) of aluminum for placing the insulated substrate 1 thereon and an outer frame (not shown) which is bonded to the metal base plate so as to surround the IGBT 2 and the control IC 4.
Then, operation of the IGBT 2 is described. When the control voltage Vd is turned on in a state in which a power source voltage is applied between the emitter E and a collector C of the IGBT 2 via a load (not shown), the control voltage Vd is outputted from the control terminal 4a of the control IC 4 to the insulated gate G of the IGBT 2 through the gate resistance circuit 5, so that electric current IG for charging between the insulated gate G and the emitter E of the IGBT 2 flows between the insulated gate G and the emitter E by way of the gate resistance 6 and thus, a gate voltage VGE rises gradually. When the gate voltage VGE has exceeded its threshold voltage Vth, a collector-emitter voltage VCE is turned on and thus, emitter current IE (collector current IC) flows.
As will be seen from FIGS. 8A and 8B showing turn-off waveforms of the IGBT 2 in the case of a resistance load and an inductance load, respectively, when the control voltage Vd is turned off, electric charge stored between the insulated gate G and the emitter E is discharged by way of the gate resistance 6 and thus, the gate voltage VGE drops gradually. When the gate voltage VGE has reached the threshold voltage Vth or less, the collector-emitter voltage VCE is turned off and thus, the emitter current IE is interrupted.
Meanwhile, rise and fall rates of the gate voltage VGE of the IGBT 2 upon turning on and off of the control voltage Vd, i.e., values of (dv/dt) are determined by a resistance value of the gate resistance 6 forming the gate resistance circuit 5. When the value of (dv/dt) is large upon turning on of the control voltage Vd, change rate (di/dt) of the emitter current IE increases necessarily and thus, noises offer a problem. However, even if the value of (dv/dt) is slightly large upon turning off of the control voltage Vd, noises seldom pose a problem. Therefore, in order to restrain, as a countermeasure against the noises, the value of (dv/dt) upon turning on of the control voltage Vd, the resistance value of the gate resistance 6 is set at a comparatively large value.
On the other hand, if the resistance value of the gate resistance 6 is set at the comparatively large value, it takes a long time to charge and discharge between the insulated gate G and the emitter E and thus, turn-off time becomes long. Namely, a time period during which the large emitter current IE flows while a potential difference between the collector C and the emitter E is large becomes long. As is apparent from comparison between FIG. 8A showing the turn-off waveform of the IGBT 2 in the case of the resistance load and FIG. 8B showing the turn-off waveform of the IGBT 2 in the case of the inductance load, thermal loss increases especially in the case of the inductance load of FIG. 8B, thereby resulting in a risk of thermal breakdown of the IGBT 2.
Therefore, in order to reduce thermal loss of the IGBT 2, it is desirable that, at the time of turning on of the control voltage Vd, the change rate (di/dt) of the emitter current IE is reduced by restraining the value of (dv/dt) and, at the time of turning off of the control voltage Vd, electric charge stored between the insulated gate G and the emitter E is rapidly discharged such that the emitter current IE is interrupted in a short time period. To this end, a power module shown in FIG. 9 is known in which in the gate resistance circuit 5, a Zener diode 7 is inserted in parallel with the gate resistance 6 having a large resistance value such that an anode A of the Zener diode 7 is directed towards the insulated gate terminal 2A.
In the known power module shown in FIG. 9, charging between the insulated gate G and the emitter E upon turning on of the control voltage Vd is performed by the gate resistance 6 having the large resistance value and thus, the value of (dv/dt) can be restrained low. On the other hand, upon turning off of the control voltage Vd, electric charge stored between the insulated gate G and the emitter E is rapidly discharged via the Zener diode 7 and thus, the emitter current IE can be interrupted in a short time period. However, although influence exerted by the value of (dv/dt) at the time of turning off of the control voltage Vd is slight in comparison with that at the time of turning on of the control voltage Vd, noises caused by the large value of (dv/dt) become nonnegligible if discharging is performed excessively rapidly.
In the conventional power module of FIG. 7, the control voltage Vd is outputted from the control IC 4 to the insulated gate terminal 2A by way of the gate resistance 6 and charging and discharging between the insulated gate G and the emitter E are performed through the gate resistance 6. Hence, if the resistance value of the gate resistance 6 is set at the comparatively large value so as to limit charging current between the insulated gate G and the emitter E to a proper value such that generation of high surge voltage due to the large change rate (di/dt) of the emitter current IE is restricted, a comparatively long period is required at the time of turning off of the control voltage Vd for discharging electric current stored between the insulated gate G and the emitter E, so that it takes a long time to interrupt the emitter current IE and thus, great thermal loss is incurred disadvantageously.
In order to eliminate the above disadvantage of the conventional power module of FIG. 7, the Zener diode 7 is inserted in parallel with the gate resistance 6 in the known power module of FIG. 9 such that electric charge stored between the insulated gate G and the emitter E is rapidly discharged via the Zener diode 7 upon turning off the control voltage Vd. However, at this time, such problems arise that high surge voltage due to the high change rate (di/dt) of the emitter current IE is generated, etc.
Meanwhile, since the gate resistance circuit 5 (FIG. 7) formed by the gate resistance 6 or the gate resistance circuit (FIG. 9) formed by the gate resistance 6 and the Zener diode 7 connected to the gate resistance 6 in parallel is provided on the insulated substrate 1 together with the IGBT 2, the flywheel diode 3 and the control IC 4 so as to occupy a wiring area of the insulated substrate 1, size of the insulated substrate 1 becomes large, so that such drawbacks are incurred that production cost of the power module rises and inductance of the circuit patterns increases.
Accordingly, an essential object of the present invention is to provide, with a view to eliminating the above mentioned drawbacks of prior art field effect semiconductor devices, a field effect semiconductor device in which production of high surge voltage at the time of its turning on is restricted and load loss is small at the time of its turning off.
Another important object of the present invention is to provide a field effect semiconductor device in which by eliminating the need for space used exclusively for providing a gate resistance on an insulated substrate, the insulated substrate is made compact such that inductance of circuit patterns of the insulated substrate is reduced.
In order to accomplish these objects of the present invention, the improvement comprises in a field effect semiconductor device in which switching is performed by a gate voltage inputted from outside via a gate resistance circuit for restricting charging and discharge currents flowing between an insulated gate and an emitter: an insulated gate electrode portion which is formed by a gate electrode pad and a gate electrode insulated from the gate electrode pad; the gate resistance circuit being inserted between the gate electrode pad and the gate electrode so as to be formed integrally with the insulated gate electrode portion; and the gate resistance circuit comprising a first gate resistance and a first series circuit connected to the first gate resistance in parallel and including a second gate resistance and a first diode such that an anode of the first diode is connected to the gate electrode.